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authorMiquel Sabaté Solà <mikisabate@gmail.com>2024-12-05 15:34:33 +0100
committerMiquel Sabaté Solà <mikisabate@gmail.com>2024-12-05 16:02:51 +0100
commit76169cd214e4830a523c8c2ee7bbddc04b4253df (patch)
tree54d754426ca41729414e7f7ddb9427a61594f464 /arch/riscv/supervisor/hsm/sbi.c
parentf463d544793ff83efd8b95d0bce5ec80fd8170f3 (diff)
downloadfarga-76169cd214e4830a523c8c2ee7bbddc04b4253df.tar.gz
farga-76169cd214e4830a523c8c2ee7bbddc04b4253df.zip
supervisor: Add an example on the HSM extension
The HSM extension from SBI v2.0 allows a supervisor to manage the state of harts on the system. Moreover, it also guarantees that only one hart makes it into the booting stages of the supervisor, and it's up to the supervisor to wake up the rest through the HSM extension. I have added an example which showcases this extension in different ways, and it finally shuts down the machine. Signed-off-by: Miquel Sabaté Solà <mikisabate@gmail.com>
Diffstat (limited to 'arch/riscv/supervisor/hsm/sbi.c')
-rw-r--r--arch/riscv/supervisor/hsm/sbi.c29
1 files changed, 29 insertions, 0 deletions
diff --git a/arch/riscv/supervisor/hsm/sbi.c b/arch/riscv/supervisor/hsm/sbi.c
new file mode 100644
index 0000000..72c1521
--- /dev/null
+++ b/arch/riscv/supervisor/hsm/sbi.c
@@ -0,0 +1,29 @@
+#include "compiler.h"
+#include "sbi.h"
+
+// Implementation taken from the Linux kernel (6.12).
+struct sbi_ret __sbi_ecall(unsigned long arg0, unsigned long arg1, unsigned long arg2,
+ unsigned long arg3, unsigned long arg4, unsigned long arg5, int fid,
+ int ext)
+{
+ struct sbi_ret ret;
+
+ register uintptr_t a0 asm("a0") = (uintptr_t)(arg0);
+ register uintptr_t a1 asm("a1") = (uintptr_t)(arg1);
+ register uintptr_t a2 asm("a2") = (uintptr_t)(arg2);
+ register uintptr_t a3 asm("a3") = (uintptr_t)(arg3);
+ register uintptr_t a4 asm("a4") = (uintptr_t)(arg4);
+ register uintptr_t a5 asm("a5") = (uintptr_t)(arg5);
+ register uintptr_t a6 asm("a6") = (uintptr_t)(fid);
+ register uintptr_t a7 asm("a7") = (uintptr_t)(ext);
+
+ asm volatile("ecall"
+ : "+r"(a0), "+r"(a1)
+ : "r"(a2), "r"(a3), "r"(a4), "r"(a5), "r"(a6), "r"(a7)
+ : "memory");
+
+ ret.error = (long)a0;
+ ret.value = (long)a1;
+
+ return ret;
+}