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| author | Miquel Sabaté Solà <mikisabate@gmail.com> | 2025-08-18 17:14:49 +0200 |
|---|---|---|
| committer | Miquel Sabaté Solà <mikisabate@gmail.com> | 2025-08-18 17:14:49 +0200 |
| commit | a17dc18969c90e8938434cacae455f22eba84633 (patch) | |
| tree | 6d5567769754be6beeb7ddc6beffd7154dc6d502 /tests/cfg | |
| parent | ba351201bca9bb116c2216b3e3f031cb8000b144 (diff) | |
| download | tools.nes-a17dc18969c90e8938434cacae455f22eba84633.tar.gz tools.nes-a17dc18969c90e8938434cacae455f22eba84633.zip | |
Rebump end-to-end tests to work via git submodules
This provides a more up-to-date experience, while also allowing to test
more cases. Moreover, the latest flags from 'xa65' are being used.
All in all, both 'code.nes' and 'aoc2023.nes' appear to be working after
the latest fixes.
Signed-off-by: Miquel Sabaté Solà <mikisabate@gmail.com>
Diffstat (limited to 'tests/cfg')
| -rw-r--r-- | tests/cfg/nrom65.cfg | 62 |
1 files changed, 62 insertions, 0 deletions
diff --git a/tests/cfg/nrom65.cfg b/tests/cfg/nrom65.cfg new file mode 100644 index 0000000..bb7d234 --- /dev/null +++ b/tests/cfg/nrom65.cfg @@ -0,0 +1,62 @@ +SYMBOLS { + __STACKSIZE__: type = weak, value = $0300; # 3 pages stack +} +MEMORY { + ZP: file = "", start = $0002, size = $001A, type = rw, define = yes; + + # INES Cartridge Header + HEADER: file = %O, start = $0000, size = $0010, fill = yes; + + # 2 16K ROM Banks + # - startup + # - code + # - rodata + # - data (load) + ROM0: file = %O, start = $8000, size = $7FFA, fill = yes, define = yes; + + # Hardware Vectors at End of 2nd 8K ROM + ROMV: file = %O, start = $FFFA, size = $0006, fill = yes; + + # 1 8k CHR Bank + ROM2: file = %O, start = $0000, size = $2000, fill = yes; + + # standard 2k SRAM (-zeropage) + # $0100-$0200 cpu stack + # $0200-$0500 3 pages for ppu memory write buffer + # $0500-$0800 3 pages for cc65 parameter stack + SRAM: file = "", start = $0500, size = __STACKSIZE__, define = yes; + + # additional 8K SRAM Bank + # - data (run) + # - bss + # - heap + RAM: file = "", start = $6000, size = $2000, define = yes; +} +SEGMENTS { + ZEROPAGE: load = ZP, type = zp; + HEADER: load = HEADER, type = ro; + STARTUP: load = ROM0, type = ro, define = yes; + LOWCODE: load = ROM0, type = ro, optional = yes; + ONCE: load = ROM0, type = ro, optional = yes; + CODE: load = ROM0, type = ro, define = yes; + RODATA: load = ROM0, type = ro, define = yes; + DATA: load = ROM0, run = RAM, type = rw, define = yes; + VECTORS: load = ROMV, type = rw; + CHARS: load = ROM2, type = rw; + BSS: load = RAM, type = bss, define = yes; +} +FEATURES { + CONDES: type = constructor, + label = __CONSTRUCTOR_TABLE__, + count = __CONSTRUCTOR_COUNT__, + segment = ONCE; + CONDES: type = destructor, + label = __DESTRUCTOR_TABLE__, + count = __DESTRUCTOR_COUNT__, + segment = RODATA; + CONDES: type = interruptor, + label = __INTERRUPTOR_TABLE__, + count = __INTERRUPTOR_COUNT__, + segment = RODATA, + import = __CALLIRQ__; +} |