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| author | Miquel Sabaté Solà <mssola@mssola.com> | 2026-09-06 21:42:34 +0200 |
|---|---|---|
| committer | Miquel Sabaté Solà <mssola@mssola.com> | 2026-09-06 21:42:34 +0200 |
| commit | 9c685d5b6ca1686f944fb239ec89511f24801d44 (patch) | |
| tree | 9b857312817aa1ba17b024adb412167c9c7604ae | |
| parent | 30a572b2b3815abaf17dcd2a848430935a4ba729 (diff) | |
| download | tools.nes-9c685d5b6ca1686f944fb239ec89511f24801d44.tar.gz tools.nes-9c685d5b6ca1686f944fb239ec89511f24801d44.zip | |
vnf: also set the carry on a zero compare
Add also a test to further check corner cases on compare instructions.
Signed-off-by: Miquel Sabaté Solà <mssola@mssola.com>
| -rw-r--r-- | lib/vnf/src/lib.rs | 2 | ||||
| -rwxr-xr-x | scripts/test-e2e.sh | 6 | ||||
| -rw-r--r-- | tests/expected/runrom/cmp.txt | 18 | ||||
| -rw-r--r-- | tests/runrom/cmp.s | 37 |
4 files changed, 62 insertions, 1 deletions
diff --git a/lib/vnf/src/lib.rs b/lib/vnf/src/lib.rs index a46d291..6c0a6f2 100644 --- a/lib/vnf/src/lib.rs +++ b/lib/vnf/src/lib.rs @@ -834,7 +834,7 @@ impl Machine { // And set flags accordingly. self.status_register.zero = res == 0; self.status_register.negative = (res as u8 & 0x80) == 0x80; - self.status_register.carry = (res as u16 & 0xFF00) != 0; + self.status_register.carry = res >= 0; Ok(()) } diff --git a/scripts/test-e2e.sh b/scripts/test-e2e.sh index 7628ab4..be43685 100755 --- a/scripts/test-e2e.sh +++ b/scripts/test-e2e.sh @@ -288,6 +288,12 @@ echo "test: runrom => stack.nes" diff tests/out/stack.txt tests/expected/runrom/stack.txt exit_code=$((exit_code + $?)) +echo "test: runrom => cmp.nes" +./target/debug/nasm -Werror --asan -o tests/out/cmp.nes tests/runrom/cmp.s +./target/debug/runrom --function --dump-memory tests/out/cmp.nes > tests/out/cmp.txt +diff tests/out/cmp.txt tests/expected/runrom/cmp.txt +exit_code=$((exit_code + $?)) + echo "test: runrom => misc.nes" ./target/debug/nasm -Werror --asan --write-info --allow-unused --out tests/out/misc.nes tests/runrom/misc.s ./target/debug/runrom --nasm .nasm --dump-memory --function tests/out/misc.nes > tests/out/misc-all.txt diff --git a/tests/expected/runrom/cmp.txt b/tests/expected/runrom/cmp.txt new file mode 100644 index 0000000..e76570b --- /dev/null +++ b/tests/expected/runrom/cmp.txt @@ -0,0 +1,18 @@ +<start> PC: $8000, cycles: 7, registers: [a: $00, x: $00, y: $00, sp: $FD], status: ----I-- +lda #$00 PC: $8002, cycles: 9, registers: [a: $00, x: $00, y: $00, sp: $FD], status: ----IZ- +sta $00 PC: $8004, cycles: 12, registers: [a: $00, x: $00, y: $00, sp: $FD], status: ----IZ- +cmp $00 PC: $8006, cycles: 15, registers: [a: $00, x: $00, y: $00, sp: $FD], status: ----IZC +inc $00 PC: $8008, cycles: 20, registers: [a: $00, x: $00, y: $00, sp: $FD], status: ----I-C +cmp $00 PC: $800A, cycles: 23, registers: [a: $00, x: $00, y: $00, sp: $FD], status: N---I-- +lda #$02 PC: $800C, cycles: 25, registers: [a: $02, x: $00, y: $00, sp: $FD], status: ----I-- +cmp $00 PC: $800E, cycles: 28, registers: [a: $02, x: $00, y: $00, sp: $FD], status: ----I-C +lda #$01 PC: $8010, cycles: 30, registers: [a: $01, x: $00, y: $00, sp: $FD], status: ----I-C +cmp $00 PC: $8012, cycles: 33, registers: [a: $01, x: $00, y: $00, sp: $FD], status: ----IZC +lda #$FF PC: $8014, cycles: 35, registers: [a: $FF, x: $00, y: $00, sp: $FD], status: N---I-C +cmp $00 PC: $8016, cycles: 38, registers: [a: $FF, x: $00, y: $00, sp: $FD], status: N---I-C +rts PC: $8017, cycles: 44, registers: [a: $FF, x: $00, y: $00, sp: $FD], status: N---I-C +<end> + +== Memory dump == + +[$0] = $01 [reads=6, writes=2] diff --git a/tests/runrom/cmp.s b/tests/runrom/cmp.s new file mode 100644 index 0000000..29deda3 --- /dev/null +++ b/tests/runrom/cmp.s @@ -0,0 +1,37 @@ +.segment "HEADER" + .byte 'N', 'E', 'S', $1A + .byte $02, $01 + .byte $00 + .byte $00 + +.segment "CHARS" +.byte 0 + +.segment "VECTORS" + .addr reset, reset, reset + +.segment "CODE" +;; asan:stack full + +zp_mem = $00 + +.proc reset + lda #0 + sta zp_mem + + cmp zp_mem + + inc zp_mem + cmp zp_mem + + lda #2 + cmp zp_mem + + lda #1 + cmp zp_mem + + lda #$FF + cmp zp_mem + + rts +.endproc |
