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Diffstat (limited to 'src/btree.s')
| -rw-r--r-- | src/btree.s | 132 |
1 files changed, 132 insertions, 0 deletions
diff --git a/src/btree.s b/src/btree.s new file mode 100644 index 0000000..2867bf0 --- /dev/null +++ b/src/btree.s @@ -0,0 +1,132 @@ +.segment "HEADER" + .byte 'N', 'E', 'S', $1A + + ;; We split the PRG-ROM into two 16KB sections, the first fixed (the game + ;; itself), and then the second one, which holds the library. + .byte $02 + + ;; We keep the CHR-ROM simple: the most basic one (8KB) and no windows. + .byte $01 + + ;; - bit 1: contains battery-backed PRG RAM ($6000-7FFF) + ;; - bit 7-4: the lower nibble of the mapper (#%0001 for MMC1) + .byte $12 + + ;; Blanked out stuff. + .res $09, $00 + +;; asan:fixed-segments FIXED, LIBTREE +.segment "FIXED" +.asciiz "@mssola" + +.include "../include/apu.s" +.include "../include/oam.s" +.include "../include/ppu.s" +.include "../include/mmc1.s" +.include "../include/asm.s" + +.include "lib.s" +.include "interrupts.s" + +.proc reset + ;; Disable interrupts and decimal mode. + sei + cld + + ;; Disable APU frame counter. + ldx #$40 + stx APU::m_frame_counter + + ;; Setup the stack. + ldx #$FF + txs ; asan:stack $80-$FF + + ;; Disable NMIs and the APU's DMC. + inx + stx PPU::m_control + stx PPU::m_mask + stx APU::m_dmc + + ;; Reset MMC1 chip. +reset_mmc1: + inc reset_mmc1 + + ;; First PPU wait. + bit PPU::m_status +@vblankwait1: + bit PPU::m_status + bpl @vblankwait1 + + ;; Reset all sprites by simply moving the Y coordinate out of screen. + lda #$EF + ldx #0 +@sprite_reset_loop: + sta OAM::m_sprites, x + inx + inx + inx + inx + bne @sprite_reset_loop + + ;; DMA setup for sprite reset. + lda #$00 + sta OAM::m_address + lda #$02 + sta OAM::m_dma + + ;; Second PPU wait. After that the PPU is stable. +@vblankwait2: + bit PPU::m_status + bpl @vblankwait2 + + ;;; + ;; Configure the MMC1 chip. + + ;; The control register: + ;; + ;; - bits 0-1: nametable arrangement: horizontal mirroring. + ;; - bits 2-3: PRG-ROM fixed at $8000 (game), swappable at $C000 (library). + ;; - bit 4: CHR-ROM: 8KB at a time. + lda #%00001011 + sta MMC1::m_control + lsr + sta MMC1::m_control + lsr + sta MMC1::m_control + lsr + sta MMC1::m_control + lsr + sta MMC1::m_control + + ;; CHR bank: 0. + lda #0 + sta MMC1::m_chr_bank + sta MMC1::m_chr_bank + sta MMC1::m_chr_bank + sta MMC1::m_chr_bank + sta MMC1::m_chr_bank + + ;; The swappable bank is 1, which contains the library. Also set PRG-RAM to + ;; be enabled. + lda #1 + sta MMC1::m_prg_bank + sta MMC1::m_prg_bank + sta MMC1::m_prg_bank + sta MMC1::m_prg_bank + sta MMC1::m_prg_bank + + __fallthrough__ main +.endproc + +.proc main + jsr Btree::todo + +@tbd: + jmp @tbd +.endproc + +.segment "VECTORS" +.addr nmi, reset, irq + +.segment "CHARS" +.incbin "../assets/btree.chr" |
