From 2eead36f97faf5bdad1abd60a220c0af72a5526c Mon Sep 17 00:00:00 2001 From: Miquel Sabaté Solà Date: Tue, 3 Dec 2024 14:34:43 +0100 Subject: Run a hart lottery on SMP MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit On systems with SMP multiple harts will try to run the kernel, and they will appear at random. But in this kernel, in order to keep things simple, we want to make sure that *only one* hart is running the show, as it greatly simplifies things on these kinds of systems. The solution is similar to what Linux does, which is to allow the first hart to initialize things, but then (and different to what Linux does), it will infinitely stall all the other harts that arrive at a random later point in time. In order to make this more apparent, I have also added a print message showing which hart is being used to run the whole thing. Signed-off-by: Miquel Sabaté Solà --- kernel/head.S | 17 +++++++++++++++++ 1 file changed, 17 insertions(+) (limited to 'kernel/head.S') diff --git a/kernel/head.S b/kernel/head.S index 74f83d8..b175b89 100644 --- a/kernel/head.S +++ b/kernel/head.S @@ -63,6 +63,23 @@ _start_kernel: // Flush the instruction cache fence.i + // Run the hart lottery. If this is not the first time that it happens, then + // stall this hart forever: on this simple kernel we only want one hart + // available to avoid SMP shenanigans. See explanation on fbos/init.h. + la a3, hart_lottery + li a2, 1 + amoadd.w a3, a2, (a3) + beqz a3, .Lhart_proceed +.Lhart_wait: + wfi + j .Lhart_wait + +.Lhart_proceed: + // Store the hart id as we will tamper with the 'a0' register later when + // performing the call to `start_kernel`. + la a3, hart_id + sw a0, 0(a3) + // Reset all registers except ra, a0, a1. li sp, 0 li gp, 0 -- cgit v1.2.3