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* usr: Add a strcmp exampleMiquel Sabaté Solà2024-12-051-0/+20
| | | | Signed-off-by: Miquel Sabaté Solà <mikisabate@gmail.com>
* arch/riscv/usr: Add t0 in the clobber listMiquel Sabaté Solà2024-12-051-1/+1
| | | | Signed-off-by: Miquel Sabaté Solà <mikisabate@gmail.com>
* Provide an improved example on early boot stageMiquel Sabaté Solà2024-12-051-7/+7
| | | | | | This also implied a renaming arch/riscv/bios -> arch/riscv/machine. Signed-off-by: Miquel Sabaté Solà <mikisabate@gmail.com>
* Add a note on Zawrs extensionMiquel Sabaté Solà2024-12-051-2/+13
| | | | Signed-off-by: Miquel Sabaté Solà <mikisabate@gmail.com>
* Provide an example on RISC-V atomic addsMiquel Sabaté Solà2024-12-051-0/+42
| | | | Signed-off-by: Miquel Sabaté Solà <mikisabate@gmail.com>
* Restructure the whole thingMiquel Sabaté Solà2024-12-051-0/+89
It will be something more than just messing around with RISC-V stuff. Signed-off-by: Miquel Sabaté Solà <mikisabate@gmail.com>