| Commit message (Collapse) | Author | Age | Files | Lines | |
|---|---|---|---|---|---|
| * | Provide an improved example on early boot stage | Miquel Sabaté Solà | 2024-12-05 | 1 | -7/+7 |
| | | | | | | | This also implied a renaming arch/riscv/bios -> arch/riscv/machine. Signed-off-by: Miquel Sabaté Solà <mikisabate@gmail.com> | ||||
| * | Add a note on Zawrs extension | Miquel Sabaté Solà | 2024-12-05 | 1 | -2/+13 |
| | | | | | Signed-off-by: Miquel Sabaté Solà <mikisabate@gmail.com> | ||||
| * | Provide an example on RISC-V atomic adds | Miquel Sabaté Solà | 2024-12-05 | 1 | -0/+42 |
| | | | | | Signed-off-by: Miquel Sabaté Solà <mikisabate@gmail.com> | ||||
| * | Restructure the whole thing | Miquel Sabaté Solà | 2024-12-05 | 1 | -0/+89 |
| It will be something more than just messing around with RISC-V stuff. Signed-off-by: Miquel Sabaté Solà <mikisabate@gmail.com> | |||||
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index : farga | |
| A bunch of code that messes with low level stuff. |
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